so far so good!

Nearly 10 days of coding,the two-stage matrix converter works now.The DSP(TMSLF2407A) code is written in C,which is portable to other target CPU such as 2812 or the newly came out high performance 2833.For the specific feature of matrix converter,we can not use the svpwm module of 2407,because in two-stage matrix converter,the rectifier-stage is not the same as 3-phase voltage boost pwm rectifier which applies the svpwm modulation.Actually it is current type rectifier.Although the inverter-stage applies the svpwm modulation strategy,for the sake of zero-current commutation,the svpwm modulation strategy is a little more complex----which has to be divided into two parts.The event manager of 2407 does has svpwm generator,but it can not satisfy our design.No other way,we choose CPLD to generate pwm gate signals.CPLD code is written in VHDL.Pictures listed left are screen shot of gate signals of leg A of rectifer-stage and phase-phase gate signal of inverter stage.Modulation duty-cycle is 400us,which is 2.5Kilo Hz.The svpwm reference voltage 25HZ.